Regviz

Silicon Labs /BGM220PC22HNA /MODEM_NS /ANTDIVCTRL

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Interpret as ANTDIVCTRL

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https://regviz.com/r/Silicon Labs/EFR32BG22C112F352GM32/MODEM_S/ANTDIVCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADPRETHRESH0 (DISABLE)ENADPRETHRESH

ENADPRETHRESH=DISABLE

Description

No Description

Fields

ADPRETHRESH

Preamble threshold
ENADPRETHRESH

Enable Preamble threshold

0 (DISABLE): Disable use of Preamble threshold after timing detection

1 (ENABLE): Enable use of Preamble threshold after timing detection

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data